Ayar Labs brings creativity to build optical XPU, challenging the limits of copper interconnect and targeting ultra-large-scale enterprises

Tech     8:43am, 20 November 2025

NVIDIA (NVIDIA)-backed photonics startup Ayar Labs announced on Sunday (16th) that it will cooperate with Taiwan-based semiconductor design service provider Creative Electronics (GUC) to integrate optical I/O dies into Creative’s XPU reference design.

Compared with copper interconnect lines that have limited distances and often require expensive timers (retimers), Ayar's TeraPHY photonic chips can be co-packaged with computing chips to provide a total bandwidth of more than 200 Tbps from chip to chip.

If Ayar and Creative achieve this design, XPUs based on this technology will be more than 10 times faster than today's fastest 14.4 Tbps interconnect. Foreign media The Register pointed out that this type of optical I/O will allow the computing domain to be expanded from one rack to multiple racks, or even across an entire row or entire data hall, without sacrificing power consumption.

Ayar CTO Vladimir Stojanovic said in an interview with El Reg that he hopes to connect up to 10,000 GPU chips in an expanded computing domain while maintaining rack power and power density at approximately 100kW.

By integrating optics directly into GPUs and other ASICs, chip designers can break through the limitations of copper wires to create larger computing areas and spread the chips over a larger space without sacrificing performance.

Ayar has now integrated its optical I/O into multiple prototypes, including one built in partnership with Intel and the U.S. Defense Advanced Research Projects Agency (DARPA). Stojanovic noted that the technology has been proven to work and the form factor is feasible. It is a "triplet" that can be integrated into the entire multi-chip packaging platform.

But it is another matter entirely to verify whether this technology can be used on TSMC foundry dies and operate reliably in a mass production environment. If the optical I/O chip fails, it could render a $50,000 accelerator useless.

Current ideas will use Ayar's designs and be verified against a variety of reference architectures, and hyperscalers will be able to develop designs based on these architectures in the future. Stojanovic said that by working with creatives, we are creating a reference process that high-volume manufacturing customers can use. He expects that within the next two years, these technologies will be mature enough for optical I/O to be integrated into accelerators in volume production.

Many hyperscale players typically license IP to vendors such as Broadcom and Marvell rather than investing internal resources to reinvent the wheel from scratch. In theory, Ayar's partnership with Creative should provide hyperscalers with a shortcut to integrating photonics technology.

Creative Technology Chief Igor Elkanovich said in a statement that the new joint design can solve the challenges of CPO (co-packaged optics) integration, including architecture, power consumption and signal integrity, mechanism and heat dissipation, to ensure that future customers can obtain a robust, high-bandwidth and high-performance solution.

Initially, Ayar and Creativity will target XPU designs using multi-die packages, using the UCIe-S and UCIe-A die interconnect standards respectively for package-level and die-to-die level optical I/O die integration.

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